diff -urN linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/Board/boardEnv/DB_88FXX81/mvBoardEnvSpec.h linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/Board/boardEnv/DB_88FXX81/mvBoardEnvSpec.h --- linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/Board/boardEnv/DB_88FXX81/mvBoardEnvSpec.h 2007-09-01 18:00:24.000000000 +0900 +++ linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/Board/boardEnv/DB_88FXX81/mvBoardEnvSpec.h 2007-09-01 18:05:42.000000000 +0900 @@ -124,8 +124,13 @@ #define MV_BOARD_I2C_MAGIC 0xFEEDFEED +#ifdef MV_NAND_BOOT +#define BOOT_FLASH_INDEX 0 +#define MAIN_FLASH_INDEX 0 +#else #define BOOT_FLASH_INDEX 0 #define MAIN_FLASH_INDEX 1 +#endif /* MV_NAND_BOOT */ /* Boot Flash definitions */ #define MV_BOARD_BOOT_FLASH_BASE_ADRS mvBoardGetDeviceBaseAddr(BOOT_FLASH_INDEX, \ @@ -1256,7 +1261,13 @@ /*************************************************/ /****** BUFFALO Added ******************************/ /*************************************************/ +#define CONFIG_KUROBOX_KUROBOX_NAND_ENABLE + +#if defined CONFIG_KUROBOX_KUROBOX_NAND_ENABLE +#define BUFFALO_BOARD_LS_GL_MPP0_7 0x44220003 +#else #define BUFFALO_BOARD_LS_GL_MPP0_7 0x55220003 +#endif #define BUFFALO_BOARD_LS_GL_MPP8_15 0x55550000 #define BUFFALO_BOARD_LS_GL_MPP16_23 0x0 #define BUFFALO_BOARD_LS_GL_MPP_DEV 0x0 @@ -1266,6 +1277,62 @@ 3:rtc */ +#if defined CONFIG_KUROBOX_KUROBOX_NAND_ENABLE +#define BUFFALO_BOARD_LS_GL_INFO { \ + \ + "BUFFALO_BOARD_LS_GL", /* boardName[MAX_BOARD_NAME_LEN] */ \ + \ + {BUFFALO_BOARD_LS_GL_MPP0_7, /* mpp0_7 */ \ + BUFFALO_BOARD_LS_GL_MPP8_15, /* mpp8_15 */ \ + BUFFALO_BOARD_LS_GL_MPP16_23, /* mpp16_23 */ \ + BUFFALO_BOARD_LS_GL_MPP_DEV}, /* mppDev */ \ + \ + ((1<<2)), /* intsGppMask */ \ + \ + /*{params, devType, devWidth}*/ /* devCsInfo[MV_BOARD_MAX_DEV] */ \ + \ + {{ 0x8fcfffff, BOARD_DEV_NAND_FLASH, 8}, /* devCs0 */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}, /* devCs1 */ \ + { N_A, N_A, N_A}, /* devCs2/flashCs */ \ + { 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8}}, /* bootCs */ \ + \ + /*pciBoardIf[MV_BOARD_MAX_PCI_IF];*/ \ + \ + {{N_A, /* firstSlotDevNum */ \ + 0, /* pciSlotsNum */ \ + \ + /*pciSlot[MV_BOARD_MAX_PCI_SLOTS]*/ \ + /* {{intAGppPin, intBGppPin, intCGppPin, intDGppPin}} */ \ + \ + {{ {N_A, N_A, N_A, N_A}}, /* pciSlot0 */ \ + { {N_A, N_A, N_A, N_A}}, /* pciSlot1 */ \ + { {N_A, N_A, N_A, N_A}}}}}, /* pciSlot2 */ \ + \ + 0x32, /* rtcTwsiAddr */ \ + ADDR7_BIT, /* rtcTwsiAddrType */ \ + N_A, /* pexPciBridgeTwsiAddr */ \ + N_A, /* pexPciBridgeTwsiAddrType */ \ + \ + {0x8}, /* ethPhyAddr[MV_BOARD_MAX_PORTS] */\ + \ + 3, /* rtcIntPin */ \ + N_A, /* switchIntPin */ \ + {N_A,N_A}, /* vbusUsbGppPin[MV_BOARD_MAX_USB_IF] */ \ + \ + 0, /* activeLedsNumber */ \ + \ + {N_A, /* led0GppPin */ \ + N_A, /* led1GppPin */ \ + N_A, /* led2GppPin */ \ + N_A, /* led3GppPin */ \ + N_A, /* led4GppPin */ \ + N_A, /* led5GppPin */ \ + N_A, /* led6GppPin */ \ + N_A}, /* led7GppPin */ \ + 0, /* ledsPolarity */ \ + N_A /* refClkGppPin */ \ +} +#else #define BUFFALO_BOARD_LS_GL_INFO { \ \ "BUFFALO_BOARD_LS_GL", /* boardName[MAX_BOARD_NAME_LEN] */ \ @@ -1320,6 +1387,7 @@ 0, /* ledsPolarity */ \ N_A /* refClkGppPin */ \ } +#endif #endif //CONFIG_BUFFALO_LINKSTATION_LSGL diff -urN linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/LSP/Kconfig linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/LSP/Kconfig --- linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/LSP/Kconfig 2007-09-01 18:00:24.000000000 +0900 +++ linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/LSP/Kconfig 2007-08-28 12:37:22.000000000 +0900 @@ -46,6 +46,16 @@ bool default y +config MV_NAND + bool "Marvell support for MTD NAND device" + default n + +config MV_NAND_BOOT + bool "Booting from NAND device" + depends on MV_NAND + ---help--- + Choose this option if NAND MTD is the system boot device. + config USE_DSP bool "use pld/ldrd/strd arm DSP instructions" default n diff -urN linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/LSP/core.c linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/LSP/core.c --- linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/LSP/core.c 2007-09-01 18:00:24.000000000 +0900 +++ linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/LSP/core.c 2007-08-30 03:07:11.000000000 +0900 @@ -203,6 +203,138 @@ } #endif +static void config_device_cs(void) +{ + /* changing default CPU windows settings for a specific platform */ + MV_CPU_DEC_WIN cs_win; + memset(&cs_win,0,sizeof(MV_CPU_DEC_WIN)); + + switch(mvBoardIdGet()) { + case(RD_88F5181_POS_NAS): + /* CS0: N/A. CS1: 16M NOR. CS2: N/A. bootCS: 0.5M NOR */ + mvCpuIfTargetWinEnable(DEVICE_CS2, MV_FALSE); + mvCpuIfTargetWinGet(DEVICE_CS1, &cs_win); + cs_win.addrWin.size = _16M; + mvCpuIfTargetWinSet(DEVICE_CS1, &cs_win); + mvCpuIfTargetWinEnable(DEVICE_CS0, MV_FALSE); + break; + case(RD_88F5182_2XSATA): + case(RD_88F5182_2XSATA3): + /* CS0: (I) N/A, (II) CESA. CS1: 16M NOR. CS2: N/A. bootCS: 0.5M NOR. */ + mvCpuIfTargetWinEnable(DEVICE_CS2, MV_FALSE); + mvCpuIfTargetWinGet(DEVICE_CS1, &cs_win); + cs_win.addrWin.size = _16M; + mvCpuIfTargetWinSet(DEVICE_CS1, &cs_win); + mvCpuIfTargetWinEnable(DEVICE_CS0, MV_FALSE); +#if defined(CONFIG_MV_CESA) || defined (USB_UNDERRUN_WA) + cs_win.addrWin.baseLow = CRYPT_ENG_BASE; + cs_win.addrWin.size = CRYPT_ENG_SIZE; + cs_win.enable = MV_TRUE; + cs_win.winNum = mvAhbToMbusWinAvailGet(); + if(cs_win.winNum == 0xffffffff) + printk("Line %d: Error no more available windows \n",__LINE__); + mvCpuIfTargetWinSet(CRYPT_ENG, &cs_win); +#endif + break; + case(RD_88F5181_VOIP): + /* CS0: TDM FPGA. CS1: 8M NOR. CS2: N/A. bootCS: 0.5 NOR. */ + mvCpuIfTargetWinEnable(DEVICE_CS2, MV_FALSE); + mvCpuIfTargetWinGet(DEVICE_CS1, &cs_win); + cs_win.addrWin.size = _8M; + mvCpuIfTargetWinSet(DEVICE_CS1, &cs_win); + break; + case(RD_88F5181L_VOIP_FE): + case(RD_88F5181L_VOIP_GE): + case(RD_88W8660_DDR1): + /* CS0: N/A. CS1: N/A. CS2: N/A. bootCS: 16M NOR. */ + mvCpuIfTargetWinEnable(DEVICE_CS2, MV_FALSE); + mvCpuIfTargetWinEnable(DEVICE_CS1, MV_FALSE); + mvCpuIfTargetWinEnable(DEVICE_CS0, MV_FALSE); + mvCpuIfTargetWinGet(DEV_BOOCS, &cs_win); + cs_win.addrWin.baseLow = 0xf4000000; + cs_win.addrWin.size = _16M; + mvCpuIfTargetWinSet(DEV_BOOCS, &cs_win); +#if defined(CONFIG_MV_CESA) || defined (USB_UNDERRUN_WA) + cs_win.addrWin.baseLow = CRYPT_ENG_BASE; + cs_win.addrWin.size = CRYPT_ENG_SIZE; + cs_win.enable = MV_TRUE; + cs_win.winNum = mvAhbToMbusWinAvailGet(); + if(cs_win.winNum == 0xffffffff) + printk("Line %d: Error no more available windows \n",__LINE__); + mvCpuIfTargetWinSet(CRYPT_ENG, &cs_win); +#endif + break; +// case(RD_88W8660_AP82S_DDR1): + /* CS0: N/A. CS1: N/A. CS2: N/A. bootCS: (I) 32M NAND, (II) 4M NOR. */ + mvCpuIfTargetWinEnable(DEVICE_CS2, MV_FALSE); + mvCpuIfTargetWinEnable(DEVICE_CS1, MV_FALSE); + mvCpuIfTargetWinEnable(DEVICE_CS0, MV_FALSE); + mvCpuIfTargetWinGet(DEV_BOOCS, &cs_win); + cs_win.addrWin.baseLow = 0xf4000000; +#ifdef CONFIG_MV_NAND_BOOT + cs_win.addrWin.size = _1M; +#else + cs_win.addrWin.size = _4M;/*_8M;*/ +#endif + mvCpuIfTargetWinSet(DEV_BOOCS, &cs_win); + break; + case(DB_88F5181_5281_DDR1): + case(DB_88F5181_5281_DDR2): + /* CS0: N/A, CS1: 16M NOR, CS2: 7seg, bootCS: 0.5M NOR */ + mvCpuIfTargetWinEnable(DEVICE_CS0, MV_FALSE); + mvCpuIfTargetWinGet(DEVICE_CS1, &cs_win); + cs_win.addrWin.size = _16M; + mvCpuIfTargetWinSet(DEVICE_CS1, &cs_win); + break; + case(DB_88F5182_DDR2): + /* CS0: 7seg. (I) CS1: 32M NOR, CS2: CESA, (II) CS1: CESA, CS2: 32M NAND. bootCS: 0.5 NOR */ + mvCpuIfTargetWinEnable(DEVICE_CS2, MV_FALSE); + mvCpuIfTargetWinEnable(DEVICE_CS1, MV_FALSE); +#ifdef CONFIG_MV_NAND + cs_win.addrWin.baseLow = 0xf4000000; + cs_win.enable = MV_TRUE; + cs_win.addrWin.size = _1M; + cs_win.winNum = mvAhbToMbusWinAvailGet(); + if(cs_win.winNum == 0xffffffff) + printk("Line %d: Error no more available windows \n",__LINE__); + mvCpuIfTargetWinSet(DEVICE_CS2, &cs_win); +#else + cs_win.addrWin.baseLow = 0xf4000000; + cs_win.enable = MV_TRUE; + cs_win.addrWin.size = _32M; + cs_win.winNum = mvAhbToMbusWinAvailGet(); + if(cs_win.winNum == 0xffffffff) + printk("Line %d: Error no more available windows \n",__LINE__); + mvCpuIfTargetWinSet(DEVICE_CS1, &cs_win); +#endif +#if defined(CONFIG_MV_CESA) || defined (USB_UNDERRUN_WA) + cs_win.addrWin.baseLow = CRYPT_ENG_BASE; + cs_win.addrWin.size = CRYPT_ENG_SIZE; + cs_win.enable = MV_TRUE; + cs_win.winNum = mvAhbToMbusWinAvailGet(); + if(cs_win.winNum == 0xffffffff) + printk("Line %d: Error no more available windows \n",__LINE__); + mvCpuIfTargetWinSet(CRYPT_ENG, &cs_win); +#endif + break; + case(DB_88F5X81_DDR2): + case(DB_88F5X81_DDR1): + case(DB_88W8660_DDR2): + /* defaults - CS0: 7seg, CS1: 32M NOR flash, CS2: 32M NAND flash, bootCS: 0.5M NOR flash */ +#ifdef CONFIG_MV_NAND_BOOT + mvCpuIfTargetWinEnable(DEVICE_CS2, MV_FALSE); + mvCpuIfTargetWinEnable(DEVICE_CS1, MV_FALSE); + mvCpuIfTargetWinGet(DEV_BOOCS, &cs_win); + cs_win.addrWin.baseLow = 0xf4000000; + cs_win.addrWin.size = _1M; + mvCpuIfTargetWinSet(DEV_BOOCS, &cs_win); +#endif + break; + default: + printk(" %s Error : Unknown board \n", __FUNCTION__); + } +} + static void __init mv_init(void) { /* init the Board environment */ @@ -244,6 +376,8 @@ printk("\nDetected Tclk %d and SysClk %d \n",mvTclk, mvSysclk); #endif + config_device_cs(); + #if defined(CONFIG_MTD_PHYSMAP) mv_mtd_initialize(); #ifdef CONFIG_MV_CESA diff -urN linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/LSP/nand.c linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/LSP/nand.c --- linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/LSP/nand.c 1970-01-01 09:00:00.000000000 +0900 +++ linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/LSP/nand.c 2007-09-01 17:48:54.000000000 +0900 @@ -0,0 +1,181 @@ + +#include +#include +#include +#include +#include +#include +#include "mvCpuIf.h" + +//#define CONFIG_KUROBOX_NAND_DEBUG +#if defined CONFIG_KUROBOX_NAND_DEBUG +#define BUF_DEBUG(x) x +#else +#define BUF_DEBUG(x) +#endif + +extern MV_U32 boardGetDevCSNum(MV_32 devNum, MV_BOARD_DEV_TYPE devType); + +static struct mtd_info *mv_mtd; +static unsigned long baseaddr; + +#ifdef CONFIG_MTD_PARTITIONS +#define MV_NUM_OF_NAND_PARTS 3 +static struct mtd_partition parts_info[] = { + { .name = "uImage", + .offset = 0, + .size = 4 * 1024 * 1024 }, + { .name = "rootfs", + .offset = MTDPART_OFS_NXTBLK, + .size = 64 * 1024 * 1024 }, + { .name = "extra", + .offset = MTDPART_OFS_NXTBLK, + .size = MTDPART_SIZ_FULL }, +}; +static const char *part_probes[] __initdata = { "cmdlinepart", NULL }; +#endif + +static void board_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *chip = mtd->priv; + + if (cmd == NAND_CMD_NONE) + return; + + if (ctrl & NAND_CLE) + writeb(cmd, (unsigned long)chip->IO_ADDR_W | 1); + else + writeb(cmd, (unsigned long)chip->IO_ADDR_W | 2); +} + + +int __init mv_nand_init(void) +{ + struct nand_chip *this; + int err = 0; + int num_of_parts = 0; + const char *part_type = 0; + struct mtd_partition *mtd_parts = 0; + u32 physaddr; + int nand_dev_num; + MV_CPU_DEC_WIN addr_win; + + nand_dev_num =boardGetDevCSNum(0, BOARD_DEV_NAND_FLASH); + if(-1 == nand_dev_num) { + BUF_DEBUG(printk("NAND init(Debug): NAND device not found on board\n")); + err = -ENODEV; + goto out; + }else{ + BUF_DEBUG(printk("NAND init(Debug): NAND device found at dev_num(%d)\n", nand_dev_num)); + } + + + if( MV_OK != mvCpuIfTargetWinGet((DEVICE_CS0 + nand_dev_num), &addr_win) ) + { +#if defined CONFIG_BUFFALO_PLATFORM + if( MV_OK != mvCpuIfTargetWinEnable((DEVICE_CS0 + nand_dev_num), MV_TRUE)) + { + BUF_DEBUG(printk("NAND init(Debug): NAND device window enabling failed.\n")); + err = -ENODEV; + goto out; + }else{ + BUF_DEBUG(printk("NAND init(Debug): Success to NAND device window enabling.\n")); + } + if( MV_OK != mvCpuIfTargetWinGet((DEVICE_CS0 + nand_dev_num), &addr_win) ) + { + BUF_DEBUG(printk("Failed to init NAND MTD (boot-CS window %d err).\n", (DEVICE_CS0 + nand_dev_num))); + err = -ENODEV; + goto out; + } +#endif + BUF_DEBUG(printk("Failed to init NAND MTD (boot-CS window %d err).\n", (DEVICE_CS0 + nand_dev_num))); + err = -ENODEV; + goto out; + }else{ + BUF_DEBUG(printk("NAND init(Debug): boot-CS window is %d\n", (DEVICE_CS0 + nand_dev_num))); + } + + if(!addr_win.enable) { + BUF_DEBUG(printk("Failed to init NAND MTD (boot-CS window disabled).\n" )); + err = -ENODEV; + goto out; + }else{ + BUF_DEBUG(printk("NAND init(Debug): boot-CS window is Enabled.\n")); + } + physaddr = addr_win.addrWin.baseLow; + BUF_DEBUG(printk("NAND init(Debug): physaddr gotten(physaddr = 0x%08x)\n", physaddr)); + + mv_mtd = (struct mtd_info *)kmalloc(sizeof(struct mtd_info)+sizeof(struct nand_chip), GFP_KERNEL); + if(!mv_mtd){ + printk("Failed to allocate NAND MTD structure\n"); + err = -ENOMEM; + goto out; + }else{ + BUF_DEBUG(printk("NAND init(Debug): mv_mtd=0x%08x\n", mv_mtd)); + } + + memset((char*)mv_mtd,0,sizeof(struct mtd_info)+sizeof(struct nand_chip)); + + baseaddr = (unsigned long)ioremap(physaddr, 1024); + if(!baseaddr) { + printk("Failed to remap NAND MTD\n"); + err = -EIO; + goto out_mtd; + }else{ + BUF_DEBUG(printk("NAND init(Debug): baseaddr = 0x%08x\n", baseaddr)); + } + + this = (struct nand_chip *)((char *)mv_mtd+sizeof(struct mtd_info)); + mv_mtd->priv = this; + this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)baseaddr; + //this->hwcontrol = board_hwcontrol; + this->cmd_ctrl = board_hwcontrol; + //this->chip_delay = CHIP_DEPENDENT_COMMAND_DELAY; + //this->dev_ready = board_dev_ready; + //this->eccmode = NAND_ECC_SOFT; + this->ecc.mode = NAND_ECC_SOFT; + BUF_DEBUG(printk("NAND init(Debug): calling nand_scan...(nand_scan(mv_mtd,1))\n")); + if(nand_scan(mv_mtd,1)) { + BUF_DEBUG(printk("NAND init(Debug): nand_scan failed.\n")); + err = -ENXIO; + goto out_ior; + } + +#ifdef CONFIG_MTD_PARTITIONS + mv_mtd->name = "nand_mtd"; + num_of_parts = parse_mtd_partitions(mv_mtd,part_probes,&mtd_parts,0); + if(num_of_parts > 0) + part_type = "command line"; + else + num_of_parts = 0; +#endif + if(num_of_parts == 0) { + mtd_parts = parts_info; + num_of_parts = MV_NUM_OF_NAND_PARTS; + part_type = "static"; + } + + printk("Using %s partition definition\n", part_type); + add_mtd_partitions(mv_mtd, mtd_parts, num_of_parts); + goto out; + +out_ior: + iounmap((void *)baseaddr); +out_mtd: + kfree(mv_mtd); +out: + return err; +} + +module_init(mv_nand_init); + +#ifdef MODULE +static void __exit board_cleanup(void) +{ + nand_release(mv_mtd); + iounmap((void*)baseaddr); + kfree(mv_mtd); +} +module_exit(board_cleanup); +#endif + diff -urN linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/Soc/ahbtombus/mvAhbToMbus.c linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/Soc/ahbtombus/mvAhbToMbus.c --- linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/Soc/ahbtombus/mvAhbToMbus.c 2007-09-01 18:00:24.000000000 +0900 +++ linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/Soc/ahbtombus/mvAhbToMbus.c 2007-08-30 03:22:50.000000000 +0900 @@ -333,6 +333,46 @@ } /******************************************************************************* +* mvAhbToMbusWinAvailGet - Get First Available window number. +* +* DESCRIPTION: +* +* INPUT: +* +* OUTPUT: +* +* RETURN: +* +*******************************************************************************/ +MV_U32 mvAhbToMbusWinAvailGet(MV_VOID) +{ + MV_AHB_TO_MBUS_DEC_WIN decWin; + MV_U32 winNum; + + for (winNum = 0; winNum < MAX_AHB_TO_MBUS_WINS ; winNum++) + { + if (winNum == MV_AHB_TO_MBUS_INTREG_WIN) + continue; + + if (mvAhbToMbusWinGet(winNum,&decWin) != MV_OK) + { + mvOsPrintf("mvAhbToMbusWinTargetGet: mvAhbToMbusWinGet fail\n"); + return 0xffffffff; + + } + + if (decWin.enable == MV_FALSE) + { + return winNum; + } + + } + + return 0xFFFFFFFF; +} + + +/******************************************************************************* * mvAhbToMbusWinTargetGet - Get Window number associated with target * * DESCRIPTION: diff -urN linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/mv88f5181/mvSysHwConfig.h linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/mv88f5181/mvSysHwConfig.h --- linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/mv88f5181/mvSysHwConfig.h 2007-09-01 18:00:24.000000000 +0900 +++ linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/mv88f5181/mvSysHwConfig.h 2007-08-30 03:07:51.000000000 +0900 @@ -131,6 +131,11 @@ #define BOOTDEV_CS_BASE 0xff800000 #define BOOTDEV_CS_SIZE _8M +/* NAND flash stuff */ +#ifdef CONFIG_MV_NAND_BOOT +#define MV_NAND_BOOT +#endif + /* DRAM detection stuff */ #define MV_DRAM_AUTO_SIZE diff -urN linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/osServices/linux/mvOsSLinux.h linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/osServices/linux/mvOsSLinux.h --- linux-2.6.20-arm9-mvsata/arch/arm/mach-mv88fxx81/osServices/linux/mvOsSLinux.h 2007-09-01 18:00:24.000000000 +0900 +++ linux-2.6.20-arm9-mvsata-tsorg/arch/arm/mach-mv88fxx81/osServices/linux/mvOsSLinux.h 2007-08-31 12:40:38.000000000 +0900 @@ -42,7 +42,7 @@ #define __INCmvOsLinuxh /* Includes */ -#include +//#include #include #include #include diff -urN linux-2.6.20-arm9-mvsata/drivers/mtd/nand/Makefile linux-2.6.20-arm9-mvsata-tsorg/drivers/mtd/nand/Makefile --- linux-2.6.20-arm9-mvsata/drivers/mtd/nand/Makefile 2007-02-05 03:44:54.000000000 +0900 +++ linux-2.6.20-arm9-mvsata-tsorg/drivers/mtd/nand/Makefile 2007-08-28 12:39:19.000000000 +0900 @@ -3,6 +3,10 @@ # # $Id: Makefile.common,v 1.15 2004/11/26 12:28:22 dedekind Exp $ +ifeq ($(CONFIG_MV_NAND),y) +include $(TOPDIR)/arch/arm/mach-mv88fxx81/mv88f5181/mvRules.mk +endif + obj-$(CONFIG_MTD_NAND) += nand.o nand_ecc.o obj-$(CONFIG_MTD_NAND_IDS) += nand_ids.o @@ -27,3 +31,7 @@ nand-objs := nand_base.o nand_bbt.o cafe_nand-objs := cafe.o cafe_ecc.o + +ifeq ($(CONFIG_MV_NAND),y) +nand-objs += ../../../arch/arm/mach-mv88fxx81/LSP/nand.o +endif